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CMOS-Compatible Top-Down Fabrication of Periodic SiO(2) Nanostructures using a Single Mask
We propose a CMOS-compatible top-down fabrication technique of highly-ordered and periodic SiO(2) nanostructures using a single amorphous silicon (α-Si) mask layer. The α-Si mask pattern is precisely transferred into the underlying SiO(2) substrate material with a high fidelity by a novel top-down f...
Autores principales: | , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Springer US
2015
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4549353/ https://www.ncbi.nlm.nih.gov/pubmed/26306538 http://dx.doi.org/10.1186/s11671-015-1046-5 |
Sumario: | We propose a CMOS-compatible top-down fabrication technique of highly-ordered and periodic SiO(2) nanostructures using a single amorphous silicon (α-Si) mask layer. The α-Si mask pattern is precisely transferred into the underlying SiO(2) substrate material with a high fidelity by a novel top-down fabrication. It is the first time for α-Si film used as an etch mask to fabricate SiO(2) nanostructures including nanoline, nanotrench, and nanohole arrays. It is observed that the α-Si mask can significantly reduce the pattern edge roughness and achieve highly uniform and smooth sidewalls. This behavior may be attributed to the presence of high concentration of dangling bonds in α-Si mask surface. By controlling the process condition, it is possible to achieve a desired vertical etched profile with a controlled size. Our results demonstrate that SiO(2) pattern as small as sub-20 nm may be achievable. The obtained SiO(2) pattern can be further used as a nanotemplate to produce periodic or more complex silicon nanostructures. Moreover, this novel top-down approach is a potentially universal method that is fully compatible with the currently existing Si-based CMOS technologies. It offers a greater flexibility for the fabrication of various nanoscale devices in a simple and efficient way. |
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