Current-limiting challenges for all-spin logic devices

All-spin logic device (ASLD) has attracted increasing interests as one of the most promising post-CMOS device candidates, thanks to its low power, non-volatility and logic-in-memory structure. Here we investigate the key current-limiting factors and develop a physics-based model of ASLD through nano...

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Detalles Bibliográficos
Autores principales: Su, Li, Zhang, Youguang, Klein, Jacques-Olivier, Zhang, Yue, Bournel, Arnaud, Fert, Albert, Zhao, Weisheng
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Nature Publishing Group 2015
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4598875/
https://www.ncbi.nlm.nih.gov/pubmed/26449410
http://dx.doi.org/10.1038/srep14905

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4598875/
https://www.ncbi.nlm.nih.gov/pubmed/26449410
http://dx.doi.org/10.1038/srep14905

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