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An Asynchronous Low Power and High Performance VLSI Architecture for Viterbi Decoder Implemented with Quasi Delay Insensitive Templates

Convolutional codes are comprehensively used as Forward Error Correction (FEC) codes in digital communication systems. For decoding of convolutional codes at the receiver end, Viterbi decoder is often used to have high priority. This decoder meets the demand of high speed and low power. At present,...

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Detalles Bibliográficos
Autores principales: Devi, T. Kalavathi, Palaniappan, Sakthivel
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Hindawi Publishing Corporation 2015
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4617693/
https://www.ncbi.nlm.nih.gov/pubmed/26558289
http://dx.doi.org/10.1155/2015/621012