A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related devi...

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Detalles Bibliográficos
Autores principales: Kim, Jaemin, Son, Donghee, Lee, Mincheol, Song, Changyeong, Song, Jun-Kyul, Koo, Ja Hoon, Lee, Dong Jun, Shim, Hyung Joon, Kim, Ji Hoon, Lee, Minbaek, Hyeon, Taeghwan, Kim, Dae-Hyeong
Formato: Online Artículo Texto
Lenguaje:English
Publicado: American Association for the Advancement of Science 2016
Materias:
Research Articles
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4705037/
https://www.ncbi.nlm.nih.gov/pubmed/26763827
http://dx.doi.org/10.1126/sciadv.1501101

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4705037/
https://www.ncbi.nlm.nih.gov/pubmed/26763827
http://dx.doi.org/10.1126/sciadv.1501101

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