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A review on high-resolution CMOS delay lines: towards sub-picosecond jitter performance
A review on CMOS delay lines with a focus on the most frequently used techniques for high-resolution delay step is presented. The primary types, specifications, delay circuits, and operating principles are presented. The delay circuits reported in this paper are used for delaying digital inputs and...
Autores principales: | , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Springer International Publishing
2016
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4828372/ https://www.ncbi.nlm.nih.gov/pubmed/27104122 http://dx.doi.org/10.1186/s40064-016-2090-z |