Improved Gate Dielectric Deposition and Enhanced Electrical Stability for Single-Layer MoS(2) MOSFET with an AlN Interfacial Layer

Transistors based on MoS(2) and other TMDs have been widely studied. The dangling-bond free surface of MoS(2) has made the deposition of high-quality high-k dielectrics on MoS(2) a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS(2)/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS(2) metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS(2) transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al(2)O(3) on the dangling-bond free MoS(2), but also greatly enhances the electrical stability of the MoS(2) transistors. Very small hysteresis (ΔV(th)) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS(2) transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al(2)O(3) dielectric stack.