Memory window engineering of Ta(2)O(5−x) oxide-based resistive switches via incorporation of various insulating frames

Three-dimensional (3D) stackable memory frames, including nano-scaled crossbar arrays, are one of the most reliable building blocks to meet the demand of high-density non-volatile memory electronics. However, their utilization has the disadvantage of introducing issues related to sneak paths, which can negatively impact device performance. We address the enhancement of complementary resistive switching (CRS) features via the incorporation of insulating frames as a generic approach to extend their use; here, a Pt/Ta(2)O(5−x)/Ta/Ta(2)O(5−x)/Pt frame is chosen as the basic CRS cell. The incorporation of Ta/Ta(2)O(5−x)/Ta or Pt/amorphous TaN/Pt insulting frames into the basic CRS cell ensures the appreciably advanced memory features of CRS cells including higher on/off ratios, improved read margins, and increased selectivity without reliability degradation. Experimental observations identified that a suitable insulating frame is crucial for adjusting the abrupt reset events of the switching element, thereby facilitating the enhanced electrical characteristics of CRS cells that are suitable for practical applications.