Fabrication Technology and Characteristics of a Magnetic Sensitive Transistor with nc-Si:H/c-Si Heterojunction

This paper presents a magnetically sensitive transistor using a nc-Si:H/c-Si heterojunction as an emitter junction. By adopting micro electro-mechanical systems (MEMS) technology and chemical vapor deposition (CVD) method, the nc-Si:H/c-Si heterojunction silicon magnetically sensitive transistor (HSMST) chips were designed and fabricated on a p-type <100> orientation double-side polished silicon wafer with high resistivity. In addition, a collector load resistor ([Formula: see text]) was integrated on the chip, and the resistor converted the collector current ([Formula: see text]) to a collector output voltage ([Formula: see text]). When [Formula: see text] = 8.0 mA, [Formula: see text] = 10.0 V, and [Formula: see text] = 4.1 kΩ, the magnetic sensitivity ([Formula: see text]) at room temperature and temperature coefficient ([Formula: see text]) of the collector current for HSMST were 181 mV/T and −0.11%/°C, respectively. The experimental results show that the magnetic sensitivity and temperature characteristics of the proposed transistor can be obviously improved by the use of a nc-Si:H/c-Si heterojunction as an emitter junction.