Interfacial, Electrical, and Band Alignment Characteristics of HfO(2)/Ge Stacks with In Situ-Formed SiO(2) Interlayer by Plasma-Enhanced Atomic Layer Deposition

In situ-formed SiO(2) was introduced into HfO(2) gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO(2)/SiO(2) high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO(2) deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO(2) degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10(−3) A/cm(2) at gate bias of V(fb) + 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO(2)/SiO(2)/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO(2) may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.