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Development of Equivalent Material Properties of Microbump for Simulating Chip Stacking Packaging
A three-dimensional integrated circuit (3D-IC) structure with a significant scale mismatch causes difficulty in analytic model construction. This paper proposes a simulation technique to introduce an equivalent material composed of microbumps and their surrounding wafer level underfill (WLUF). The m...
Autores principales: | Lee, Chang-Chun, Tzeng, Tzai-Liang, Huang, Pei-Chen |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2015
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5455527/ https://www.ncbi.nlm.nih.gov/pubmed/28793495 http://dx.doi.org/10.3390/ma8085121 |
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