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A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel †
A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e(−)/s at 60 °C, an ultra...
| Autores principales: | , , , , , , , , , , , , , , , , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2017
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5751557/ https://www.ncbi.nlm.nih.gov/pubmed/29206162 http://dx.doi.org/10.3390/s17122816 |
| _version_ | 1783289971183976448 |
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| author | Takahashi, Seiji Huang, Yi-Min Sze, Jhy-Jyi Wu, Tung-Ting Guo, Fu-Sheng Hsu, Wei-Cheng Tseng, Tung-Hsiung Liao, King Kuo, Chin-Chia Chen, Tzu-Hsiang Chiang, Wei-Chieh Chuang, Chun-Hao Chou, Keng-Yu Chung, Chi-Hsien Chou, Kuo-Yu Tseng, Chien-Hsien Wang, Chuan-Joung Yaung, Dun-Nien |
| author_facet | Takahashi, Seiji Huang, Yi-Min Sze, Jhy-Jyi Wu, Tung-Ting Guo, Fu-Sheng Hsu, Wei-Cheng Tseng, Tung-Hsiung Liao, King Kuo, Chin-Chia Chen, Tzu-Hsiang Chiang, Wei-Chieh Chuang, Chun-Hao Chou, Keng-Yu Chung, Chi-Hsien Chou, Kuo-Yu Tseng, Chien-Hsien Wang, Chuan-Joung Yaung, Dun-Nien |
| author_sort | Takahashi, Seiji |
| collection | PubMed |
| description | A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e(−)/s at 60 °C, an ultra-low read noise of 0.90 e(−)·rms, a high full well capacity (FWC) of 4100 e(−), and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed. |
| format | Online Article Text |
| id | pubmed-5751557 |
| institution | National Center for Biotechnology Information |
| language | English |
| publishDate | 2017 |
| publisher | MDPI |
| record_format | MEDLINE/PubMed |
| spelling | pubmed-57515572018-01-10 A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel † Takahashi, Seiji Huang, Yi-Min Sze, Jhy-Jyi Wu, Tung-Ting Guo, Fu-Sheng Hsu, Wei-Cheng Tseng, Tung-Hsiung Liao, King Kuo, Chin-Chia Chen, Tzu-Hsiang Chiang, Wei-Chieh Chuang, Chun-Hao Chou, Keng-Yu Chung, Chi-Hsien Chou, Kuo-Yu Tseng, Chien-Hsien Wang, Chuan-Joung Yaung, Dun-Nien Sensors (Basel) Article A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e(−)/s at 60 °C, an ultra-low read noise of 0.90 e(−)·rms, a high full well capacity (FWC) of 4100 e(−), and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed. MDPI 2017-12-05 /pmc/articles/PMC5751557/ /pubmed/29206162 http://dx.doi.org/10.3390/s17122816 Text en © 2017 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/). |
| spellingShingle | Article Takahashi, Seiji Huang, Yi-Min Sze, Jhy-Jyi Wu, Tung-Ting Guo, Fu-Sheng Hsu, Wei-Cheng Tseng, Tung-Hsiung Liao, King Kuo, Chin-Chia Chen, Tzu-Hsiang Chiang, Wei-Chieh Chuang, Chun-Hao Chou, Keng-Yu Chung, Chi-Hsien Chou, Kuo-Yu Tseng, Chien-Hsien Wang, Chuan-Joung Yaung, Dun-Nien A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel † |
| title | A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel † |
| title_full | A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel † |
| title_fullStr | A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel † |
| title_full_unstemmed | A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel † |
| title_short | A 45 nm Stacked CMOS Image Sensor Process Technology for Submicron Pixel † |
| title_sort | 45 nm stacked cmos image sensor process technology for submicron pixel † |
| topic | Article |
| url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5751557/ https://www.ncbi.nlm.nih.gov/pubmed/29206162 http://dx.doi.org/10.3390/s17122816 |
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