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A New FPGA Architecture of FAST and BRIEF Algorithm for On-Board Corner Detection and Matching

Although some researchers have proposed the Field Programmable Gate Array (FPGA) architectures of Feature From Accelerated Segment Test (FAST) and Binary Robust Independent Elementary Features (BRIEF) algorithm, there is no consideration of image data storage in these traditional architectures that...

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Detalles Bibliográficos
Autores principales: Huang, Jingjin, Zhou, Guoqing, Zhou, Xiang, Zhang, Rongting
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2018
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5948726/
https://www.ncbi.nlm.nih.gov/pubmed/29597331
http://dx.doi.org/10.3390/s18041014