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Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers
To overcome the technological and economic obstacles of amorphous indium-gallium-zinc-oxide (a-IGZO)-based display backplane for industrial production, a clean etch-stopper (CL-ES) process is developed to fabricate a-IGZO-based thin film transistor (TFT) with improved uniformity and reproducibility...
Autores principales: | , , , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Springer US
2018
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5975049/ https://www.ncbi.nlm.nih.gov/pubmed/29845334 http://dx.doi.org/10.1186/s11671-018-2571-9 |
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author | Chung, Jae-Moon Zhang, Xiaokun Shang, Fei Kim, Ji-Hoon Wang, Xiao-Lin Liu, Shuai Yang, Baoguo Xiang, Yong |
author_facet | Chung, Jae-Moon Zhang, Xiaokun Shang, Fei Kim, Ji-Hoon Wang, Xiao-Lin Liu, Shuai Yang, Baoguo Xiang, Yong |
author_sort | Chung, Jae-Moon |
collection | PubMed |
description | To overcome the technological and economic obstacles of amorphous indium-gallium-zinc-oxide (a-IGZO)-based display backplane for industrial production, a clean etch-stopper (CL-ES) process is developed to fabricate a-IGZO-based thin film transistor (TFT) with improved uniformity and reproducibility on 8.5th generation glass substrates (2200 mm × 2500 mm). Compared with a-IGZO-based TFT with back-channel-etched (BCE) structure, a newly formed ES nano-layer (~ 100 nm) and a simultaneous etching of a-IGZO nano-layer (30 nm) and source-drain electrode layer are firstly introduced to a-IGZO-based TFT device with CL-ES structure to improve the uniformity and stability of device for large-area display. The saturation electron mobility of 8.05 cm(2)/V s and the V(th) uniformity of 0.72 V are realized on the a-IGZO-based TFT device with CL-ES structure. In the negative bias temperature illumination stress and positive bias thermal stress reliability testing under a ± 30 V bias for 3600 s, the measured V(th) shift of CL-ES-structured device significantly decreased to − 0.51 and + 1.94 V, which are much lower than that of BCE-structured device (− 3.88 V, + 5.58 V). The electrical performance of the a-IGZO-based TFT device with CL-ES structure implies that the economic transfer from a silicon-based TFT process to the metal oxide semiconductor-based process for LCD fabrication is highly feasible. |
format | Online Article Text |
id | pubmed-5975049 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2018 |
publisher | Springer US |
record_format | MEDLINE/PubMed |
spelling | pubmed-59750492018-06-11 Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers Chung, Jae-Moon Zhang, Xiaokun Shang, Fei Kim, Ji-Hoon Wang, Xiao-Lin Liu, Shuai Yang, Baoguo Xiang, Yong Nanoscale Res Lett Nano Express To overcome the technological and economic obstacles of amorphous indium-gallium-zinc-oxide (a-IGZO)-based display backplane for industrial production, a clean etch-stopper (CL-ES) process is developed to fabricate a-IGZO-based thin film transistor (TFT) with improved uniformity and reproducibility on 8.5th generation glass substrates (2200 mm × 2500 mm). Compared with a-IGZO-based TFT with back-channel-etched (BCE) structure, a newly formed ES nano-layer (~ 100 nm) and a simultaneous etching of a-IGZO nano-layer (30 nm) and source-drain electrode layer are firstly introduced to a-IGZO-based TFT device with CL-ES structure to improve the uniformity and stability of device for large-area display. The saturation electron mobility of 8.05 cm(2)/V s and the V(th) uniformity of 0.72 V are realized on the a-IGZO-based TFT device with CL-ES structure. In the negative bias temperature illumination stress and positive bias thermal stress reliability testing under a ± 30 V bias for 3600 s, the measured V(th) shift of CL-ES-structured device significantly decreased to − 0.51 and + 1.94 V, which are much lower than that of BCE-structured device (− 3.88 V, + 5.58 V). The electrical performance of the a-IGZO-based TFT device with CL-ES structure implies that the economic transfer from a silicon-based TFT process to the metal oxide semiconductor-based process for LCD fabrication is highly feasible. Springer US 2018-05-29 /pmc/articles/PMC5975049/ /pubmed/29845334 http://dx.doi.org/10.1186/s11671-018-2571-9 Text en © The Author(s). 2018 Open AccessThis article is distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. |
spellingShingle | Nano Express Chung, Jae-Moon Zhang, Xiaokun Shang, Fei Kim, Ji-Hoon Wang, Xiao-Lin Liu, Shuai Yang, Baoguo Xiang, Yong Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers |
title | Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers |
title_full | Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers |
title_fullStr | Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers |
title_full_unstemmed | Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers |
title_short | Enhancement of a-IGZO TFT Device Performance Using a Clean Interface Process via Etch-Stopper Nano-layers |
title_sort | enhancement of a-igzo tft device performance using a clean interface process via etch-stopper nano-layers |
topic | Nano Express |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5975049/ https://www.ncbi.nlm.nih.gov/pubmed/29845334 http://dx.doi.org/10.1186/s11671-018-2571-9 |
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