Electric-field-controlled interface dipole modulation for Si-based memory devices

Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO(2)/Si MOS capacitor where the interface monolayer (ML) TiO(2) functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D(it)). Consequently, we propose, a multi-stacked amorphous HfO(2)/1-ML TiO(2)/SiO(2) IDM structure to realize a low D(it) and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.