Stable and scalable 1T MoS(2) with low temperature-coefficient of resistance

Monolithic realization of metallic 1T and semiconducting 2H phases makes MoS(2) a potential candidate for future microelectronic circuits. A method for engineering a stable 1T phase from the 2H phase in a scalable manner and an in-depth electrical characterization of the 1T phase is wanting at large. Here we demonstrate a controllable and scalable 2H to 1T phase engineering technique for MoS(2) using microwave plasma. Our method allows lithographically defining 1T regions on a 2H sample. The 1T samples show excellent temporal and thermal stability making it suitable for standard device fabrication techniques. We conduct both two-probe and four-probe electrical transport measurements on devices with back-gated field effect transistor geometry in a temperature range of 4 K to 300 K. The 1T samples exhibit Ohmic current-voltage characteristics in all temperature ranges without any dependence to the gate voltage, a signature of a metallic state. The sheet resistance of our 1T MoS(2) sample is considerably lower and the carrier concentration is a few orders of magnitude higher than that of the 2H samples. In addition, our samples show negligible temperature dependence of resistance from 4 K to 300 K ruling out any hoping mediated or activated electrical transport.