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High mobility Ge pMOSFETs with amorphous Si passivation: impact of surface orientation

We report the amorphous Si passivation of Ge pMOSFETs fabricated on (001)-, (011)-, and (111)-orientated surfaces for advanced CMOS and thin film transistor applications. Amorphous Si passivation of Ge is carried out by magnetron sputtering at room temperature. With the fixed thickness of Si t(Si),...

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Detalles Bibliográficos
Autores principales: Liu, Huan, Han, Genquan, Liu, Yan, Tang, Xiaosheng, Yang, Jingchen, Hao, Yue
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Springer US 2019
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6325052/
https://www.ncbi.nlm.nih.gov/pubmed/30623254
http://dx.doi.org/10.1186/s11671-018-2847-0
Descripción
Sumario:We report the amorphous Si passivation of Ge pMOSFETs fabricated on (001)-, (011)-, and (111)-orientated surfaces for advanced CMOS and thin film transistor applications. Amorphous Si passivation of Ge is carried out by magnetron sputtering at room temperature. With the fixed thickness of Si t(Si), (001)-oriented Ge pMOSFETs achieve the higher on-state current I(ON) and effective hole mobility μ(eff) compared to the devices on other orientations. At an inversion charge density Q(inv) of 3.5 × 10(12) cm(−2), Ge(001) transistors with 0.9 nm t(Si) demonstrate a peak μ(eff) of 278 cm(2)/V × s, which is 2.97 times higher than the Si universal mobility. With the decreasing of t(Si), I(ON) of Ge transistors increases due to the reduction of capacitive effective thickness, but subthreshold swing and leakage floor characteristics are degraded attributed to the increasing of midgap D(it).