An electrical characterisation methodology for identifying the switching mechanism in TiO(2) memristive stacks

Resistive random access memories (RRAMs) can be programmed to discrete resistive levels on demand via voltage pulses with appropriate amplitude and widths. This tuneability enables the design of various emerging concepts, to name a few: neuromorphic applications and reconfigurable circuits. Despite the wide interest in RRAM technologies there is still room for improvement and the key lies with understanding better the underpinning mechanism responsible for resistive switching. This work presents a methodology that aids such efforts, by revealing the nature of the resistive switching through assessing the transport properties in the non-switching operation regimes, before and after switching occurs. Variation in the transport properties obtained by analysing the current-voltage characteristics at distinct temperatures provides experimental evidence for understanding the nature of the responsible mechanism. This study is performed on prototyped device stacks that possess common Au bottom electrodes, identical TiO(2) active layers while employing three different top electrodes, Au, Ni and Pt. Our results support in all cases an interface controlled transport due to Schottky emission and suggest that the acquired gradual switching originates by the bias induced modification of the interfacial barrier. Throughout this study, the top electrode material was found to play a role in determining the electroforming requirements and thus indirectly the devices’ memristive characteristics whilst both the top and bottom metal/oxide interfaces are found to be modified as result of this process.