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Hybrid Circuit of Memristor and Complementary Metal-Oxide-Semiconductor for Defect-Tolerant Spatial Pooling with Boost-Factor Adjustment

Hierarchical Temporal Memory (HTM) has been known as a software framework to model the brain’s neocortical operation. However, mimicking the brain’s neocortical operation by not software but hardware is more desirable, because the hardware can not only describe the neocortical operation, but can als...

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Detalles Bibliográficos
Autores principales: Nguyen, Tien Van, Pham, Khoa Van, Min, Kyeong-Sik
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2019
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6651624/
https://www.ncbi.nlm.nih.gov/pubmed/31266255
http://dx.doi.org/10.3390/ma12132122