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A low-cost concurrent TSV test architecture with lossless test output compression scheme
As the traditional IC design migrates to three-dimensional integrated circuits (3D-ICs) design, new challenges need to be considered carefully to solve its reliability and yield issues. 3D-ICs using through-silicon-vias (TSVs) can have latent defects such as resistive open and bridge defects, which...
| Autores principales: | , , , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
Public Library of Science
2019
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6707603/ https://www.ncbi.nlm.nih.gov/pubmed/31442246 http://dx.doi.org/10.1371/journal.pone.0221043 |