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Retention-Aware DRAM Auto-Refresh Scheme for Energy and Performance Efficiency
Dynamic random access memory (DRAM) circuits require periodic refresh operations to prevent data loss. As DRAM density increases, DRAM refresh overhead is even worse due to the increase of the refresh cycle time. However, because of few the cells in memory that have lower retention time, DRAM has to...
| Autores principales: | , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2019
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6780894/ https://www.ncbi.nlm.nih.gov/pubmed/31500379 http://dx.doi.org/10.3390/mi10090590 |