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A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator
Ultra-low power and high-performance logical devices have been the driving force for the continued scaling of complementary metal oxide semiconductor field effect transistors which greatly enable electronic devices such as smart phones to be energy-efficient and portable. In the pursuit of smaller a...
Autores principales: | , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2020
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7074695/ https://www.ncbi.nlm.nih.gov/pubmed/32098218 http://dx.doi.org/10.3390/mi11020223 |
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author | Zhang, Yannan Han, Ke Li, Jiawei |
author_facet | Zhang, Yannan Han, Ke Li, Jiawei |
author_sort | Zhang, Yannan |
collection | PubMed |
description | Ultra-low power and high-performance logical devices have been the driving force for the continued scaling of complementary metal oxide semiconductor field effect transistors which greatly enable electronic devices such as smart phones to be energy-efficient and portable. In the pursuit of smaller and faster devices, researchers and scientists have worked out a number of ways to further lower the leaking current of MOSFETs (Metal oxide semiconductor field effect transistor). Nanowire structure is now regarded as a promising candidate of future generation of logical devices due to its ultra-low off-state leaking current compares to FinFET. However, the potential of nanowire in terms of off-state current has not been fully discovered. In this article, a novel Core–Insulator Gate-All-Around (CIGAA) nanowire has been proposed, investigated, and simulated comprehensively and systematically based on 3D numerical simulation. Comparisons are carried out between GAA and CIGAA. The new CIGAA structure exhibits low off-state current compares to that of GAA, making it a suitable candidate of future low-power and energy-efficient devices. |
format | Online Article Text |
id | pubmed-7074695 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2020 |
publisher | MDPI |
record_format | MEDLINE/PubMed |
spelling | pubmed-70746952020-03-20 A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator Zhang, Yannan Han, Ke Li, Jiawei Micromachines (Basel) Article Ultra-low power and high-performance logical devices have been the driving force for the continued scaling of complementary metal oxide semiconductor field effect transistors which greatly enable electronic devices such as smart phones to be energy-efficient and portable. In the pursuit of smaller and faster devices, researchers and scientists have worked out a number of ways to further lower the leaking current of MOSFETs (Metal oxide semiconductor field effect transistor). Nanowire structure is now regarded as a promising candidate of future generation of logical devices due to its ultra-low off-state leaking current compares to FinFET. However, the potential of nanowire in terms of off-state current has not been fully discovered. In this article, a novel Core–Insulator Gate-All-Around (CIGAA) nanowire has been proposed, investigated, and simulated comprehensively and systematically based on 3D numerical simulation. Comparisons are carried out between GAA and CIGAA. The new CIGAA structure exhibits low off-state current compares to that of GAA, making it a suitable candidate of future low-power and energy-efficient devices. MDPI 2020-02-21 /pmc/articles/PMC7074695/ /pubmed/32098218 http://dx.doi.org/10.3390/mi11020223 Text en © 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/). |
spellingShingle | Article Zhang, Yannan Han, Ke Li, Jiawei A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
title | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
title_full | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
title_fullStr | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
title_full_unstemmed | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
title_short | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
title_sort | simulation study of a gate-all-around nanowire transistor with a core–insulator |
topic | Article |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7074695/ https://www.ncbi.nlm.nih.gov/pubmed/32098218 http://dx.doi.org/10.3390/mi11020223 |
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