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Test Pattern Design for Plasma Induced Damage on Inter-Metal Dielectric in FinFET Cu BEOL Processes
High-density interconnects, enabled by advanced CMOS Cu BEOL technologies, lead to closely placed metals layers. High-aspect ratio metal lines require extensive plasma etching processes, which may cause reliability concerns on inter metal dielectric (IMD) layers. This study presents newly proposed t...
Autores principales: | Su, Chi, Tsai, Yi-Pei, Lin, Chrong-Jung, King, Ya-Chin |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Springer US
2020
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7195507/ https://www.ncbi.nlm.nih.gov/pubmed/32358682 http://dx.doi.org/10.1186/s11671-020-03328-7 |
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