An 8.8 ps RMS Resolution Time-To-Digital Converter Implemented in a 60 nm FPGA with Real-Time Temperature Correction

This paper presented a non-uniform multiphase (NUMP) time-to-digital converter (TDC) implemented in a field-programmable gate array (FPGA) with real-time automatic temperature compensation. NUMP-TDC is a novel, low-cost, high-performance TDC that has achieved an excellent performance in Altera Cyclo...

Descripción completa

Detalles Bibliográficos
Autores principales: Song, Zhipeng, Zhao, Zhixiang, Yu, Hongsen, Yang, Jingwu, Zhang, Xi, Sui, Tengjie, Xu, Jianfeng, Xie, Siwei, Huang, Qiu, Peng, Qiyu
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2020
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7218734/
https://www.ncbi.nlm.nih.gov/pubmed/32290511
http://dx.doi.org/10.3390/s20082172

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7218734/
https://www.ncbi.nlm.nih.gov/pubmed/32290511
http://dx.doi.org/10.3390/s20082172

Ejemplares similares