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On the Evaluation of SEU Effects on AXI Interconnect Within AP-SoCs
G-Programmable System-on-Chips offering the union of a processor system with a programmable hardware gave rise to applications that choose hardware acceleration to offload and parallelize computationally demanding tasks. Due to flexibility and performance they provide at low cost, these devices are...
| Autores principales: | , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
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2020
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7343411/ http://dx.doi.org/10.1007/978-3-030-52794-5_16 |