Single-Grain Gate-All-Around Si Nanowire FET Using Low-Thermal-Budget Processes for Monolithic Three-Dimensional Integrated Circuits

We introduce a single-grain gate-all-around (GAA) Si nanowire (NW) FET using the location-controlled-grain technique and several innovative low-thermal budget processes, including green nanosecond laser crystallization, far-infrared laser annealing, and hybrid laser-assisted salicidation, that keep...

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Detalles Bibliográficos
Autores principales: Hsieh, Tung-Ying, Hsieh, Ping-Yi, Yang, Chih-Chao, Shen, Chang-Hong, Shieh, Jia-Min, Yeh, Wen-Kuan, Wu, Meng-Chyi
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2020
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7464086/
https://www.ncbi.nlm.nih.gov/pubmed/32751538
http://dx.doi.org/10.3390/mi11080741

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7464086/
https://www.ncbi.nlm.nih.gov/pubmed/32751538
http://dx.doi.org/10.3390/mi11080741

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