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Reduction of charge offset drift using plasma oxidized aluminum in SETs
Aluminum oxide ([Formula: see text] )-based single-electron transistors (SETs) fabricated in ultra-high vacuum (UHV) chambers using in situ plasma oxidation show excellent stabilities over more than a week, enabling applications as tunnel barriers, capacitor dielectrics or gate insulators in close p...
Autores principales: | , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Nature Publishing Group UK
2020
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7588434/ https://www.ncbi.nlm.nih.gov/pubmed/33106545 http://dx.doi.org/10.1038/s41598-020-75282-4 |
Sumario: | Aluminum oxide ([Formula: see text] )-based single-electron transistors (SETs) fabricated in ultra-high vacuum (UHV) chambers using in situ plasma oxidation show excellent stabilities over more than a week, enabling applications as tunnel barriers, capacitor dielectrics or gate insulators in close proximity to qubit devices. Historically, [Formula: see text] -based SETs exhibit time instabilities due to charge defect rearrangements and defects in [Formula: see text] often dominate the loss mechanisms in superconducting quantum computation. To characterize the charge offset stability of our [Formula: see text] -based devices, we fabricate SETs with sub-1 e charge sensitivity and utilize charge offset drift measurements (measuring voltage shifts in the SET control curve). The charge offset drift ([Formula: see text] ) measured from the plasma oxidized [Formula: see text] SETs in this work is remarkably reduced (best [Formula: see text] over [Formula: see text] days and no observation of [Formula: see text] exceeding [Formula: see text] ), compared to the results of conventionally fabricated [Formula: see text] tunnel barriers in previous studies (best [Formula: see text] over [Formula: see text] days and most [Formula: see text] within one day). We attribute this improvement primarily to using plasma oxidation, which forms the tunnel barrier with fewer two-level system (TLS) defects, and secondarily to fabricating the devices entirely within a UHV system. |
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