Incremental column-wise verification of arithmetic circuits using computer algebra

Verifying arithmetic circuits and most prominently multiplier circuits is an important problem which in practice still requires substantial manual effort. The currently most effective approach uses polynomial reasoning over pseudo boolean polynomials. In this approach a word-level specification is r...

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Detalles Bibliográficos
Autores principales: Kaufmann, Daniela, Biere, Armin, Kauers, Manuel
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Springer US 2019
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7691315/
https://www.ncbi.nlm.nih.gov/pubmed/33281299
http://dx.doi.org/10.1007/s10703-018-00329-2

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7691315/
https://www.ncbi.nlm.nih.gov/pubmed/33281299
http://dx.doi.org/10.1007/s10703-018-00329-2

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