Improved Pulse-Controlled Conductance Adjustment in Trilayer Resistors by Suppressing Current Overshoot

In this work, we demonstrate the enhanced synaptic behaviors in trilayer dielectrics (HfO(2)/Si(3)N(4)/SiO(2)) on highly doped n-type silicon substrate. First, the three dielectric layers were subjected to material and chemical analyses and thoroughly investigated via transmission electron microscopy and X-ray photoelectron spectroscopy. The resistive switching and synaptic behaviors were improved by inserting a Si(3)N(4) layer between the HfO(2) and SiO(2) layers. The electric field within SiO(2) was mitigated, thus reducing the current overshoot in the trilayer device. The reset current was considerably reduced in the trilayer device compared to the bilayer device without a Si(3)N(4) layer. Moreover, the nonlinear characteristics in the low-resistance state are helpful for implementing high-density memory. The higher array size in the trilayer device was verified by cross-point array simulation. Finally, the multiple conductance adjustment was demonstrated in the trilayer device by controlling the gradual set and reset switching behavior.