A Viterbi decoder and its hardware Trojan models: an FPGA-based implementation study

Integrated circuits may be vulnerable to hardware Trojan attacks during its design or fabrication phases. This article is a case study of the design of a Viterbi decoder and the effect of hardware Trojans on a coded communication system employing the Viterbi decoder. Design of a Viterbi decoder and...

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Detalles Bibliográficos
Autores principales: Kakkara, Varsha, Balasubramanian, Karthi, Yamuna, B., Mishra, Deepak, Lingasubramanian, Karthikeyan, Murugan, Senthil
Formato: Online Artículo Texto
Lenguaje:English
Publicado: PeerJ Inc. 2020
Materias:
Computer Architecture
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7924523/
https://www.ncbi.nlm.nih.gov/pubmed/33816902
http://dx.doi.org/10.7717/peerj-cs.250

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7924523/
https://www.ncbi.nlm.nih.gov/pubmed/33816902
http://dx.doi.org/10.7717/peerj-cs.250

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