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Impact of device scaling on the electrical properties of MoS(2) field-effect transistors
Two-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Here we investigate the scaling behavior across 1300 devices fab...
Autores principales: | , , , , , , , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Nature Publishing Group UK
2021
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7987965/ https://www.ncbi.nlm.nih.gov/pubmed/33758215 http://dx.doi.org/10.1038/s41598-021-85968-y |
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author | Arutchelvan, Goutham Smets, Quentin Verreck, Devin Ahmed, Zubair Gaur, Abhinav Sutar, Surajit Jussot, Julien Groven, Benjamin Heyns, Marc Lin, Dennis Asselberghs, Inge Radu, Iuliana |
author_facet | Arutchelvan, Goutham Smets, Quentin Verreck, Devin Ahmed, Zubair Gaur, Abhinav Sutar, Surajit Jussot, Julien Groven, Benjamin Heyns, Marc Lin, Dennis Asselberghs, Inge Radu, Iuliana |
author_sort | Arutchelvan, Goutham |
collection | PubMed |
description | Two-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Here we investigate the scaling behavior across 1300 devices fabricated on large-area grown MoS(2) material with channel length down to 30 nm, contact length down to 13 nm and capacitive effective oxide thickness (CET) down to 1.9 nm. These devices show best-in-class performance with transconductance of 185 μS/μm and a minimum subthreshold swing (SS) of 86 mV/dec. We find that scaling the top-contact length has no impact on the contact resistance and electrostatics of three monolayers MoS(2) transistors, because edge injection is dominant. Further, we identify that SS degradation occurs at short channel length and can be mitigated by reducing the CET and lowering the Schottky barrier height. Finally, using a power performance area (PPA) analysis, we present a roadmap of material improvements to make 2D devices competitive with silicon gate-all-around devices. |
format | Online Article Text |
id | pubmed-7987965 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2021 |
publisher | Nature Publishing Group UK |
record_format | MEDLINE/PubMed |
spelling | pubmed-79879652021-03-25 Impact of device scaling on the electrical properties of MoS(2) field-effect transistors Arutchelvan, Goutham Smets, Quentin Verreck, Devin Ahmed, Zubair Gaur, Abhinav Sutar, Surajit Jussot, Julien Groven, Benjamin Heyns, Marc Lin, Dennis Asselberghs, Inge Radu, Iuliana Sci Rep Article Two-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Here we investigate the scaling behavior across 1300 devices fabricated on large-area grown MoS(2) material with channel length down to 30 nm, contact length down to 13 nm and capacitive effective oxide thickness (CET) down to 1.9 nm. These devices show best-in-class performance with transconductance of 185 μS/μm and a minimum subthreshold swing (SS) of 86 mV/dec. We find that scaling the top-contact length has no impact on the contact resistance and electrostatics of three monolayers MoS(2) transistors, because edge injection is dominant. Further, we identify that SS degradation occurs at short channel length and can be mitigated by reducing the CET and lowering the Schottky barrier height. Finally, using a power performance area (PPA) analysis, we present a roadmap of material improvements to make 2D devices competitive with silicon gate-all-around devices. Nature Publishing Group UK 2021-03-23 /pmc/articles/PMC7987965/ /pubmed/33758215 http://dx.doi.org/10.1038/s41598-021-85968-y Text en © The Author(s) 2021 Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article's Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article's Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/. |
spellingShingle | Article Arutchelvan, Goutham Smets, Quentin Verreck, Devin Ahmed, Zubair Gaur, Abhinav Sutar, Surajit Jussot, Julien Groven, Benjamin Heyns, Marc Lin, Dennis Asselberghs, Inge Radu, Iuliana Impact of device scaling on the electrical properties of MoS(2) field-effect transistors |
title | Impact of device scaling on the electrical properties of MoS(2) field-effect transistors |
title_full | Impact of device scaling on the electrical properties of MoS(2) field-effect transistors |
title_fullStr | Impact of device scaling on the electrical properties of MoS(2) field-effect transistors |
title_full_unstemmed | Impact of device scaling on the electrical properties of MoS(2) field-effect transistors |
title_short | Impact of device scaling on the electrical properties of MoS(2) field-effect transistors |
title_sort | impact of device scaling on the electrical properties of mos(2) field-effect transistors |
topic | Article |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7987965/ https://www.ncbi.nlm.nih.gov/pubmed/33758215 http://dx.doi.org/10.1038/s41598-021-85968-y |
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