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FPGA-Based Acceleration on Additive Manufacturing Defects Inspection

Additive manufacturing (AM) has gained increasing attention over the past years due to its fast prototype, easier modification, and possibility for complex internal texture devices when compared to traditional manufacture processing. However, potential internal defects are occurring during AM proces...

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Autores principales: Luo, Yawen, Chen, Yuhua
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2021
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8003074/
https://www.ncbi.nlm.nih.gov/pubmed/33803530
http://dx.doi.org/10.3390/s21062123
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author Luo, Yawen
Chen, Yuhua
author_facet Luo, Yawen
Chen, Yuhua
author_sort Luo, Yawen
collection PubMed
description Additive manufacturing (AM) has gained increasing attention over the past years due to its fast prototype, easier modification, and possibility for complex internal texture devices when compared to traditional manufacture processing. However, potential internal defects are occurring during AM processes, and it requires real-time inspections to minimize the costs by either aborting the processing or repairing the defect. In order to perform the defects inspection, first the defects database NEU-DET is used for training. Then, a convolution neural network (CNN) is applied to perform defects classification. For real-time purposes, Field Programmable Gate Arrays (FPGAs) are utilized for acceleration. A binarized neural network (BNN) is proposed to best fit the FPGA bit operations. Finally, for the image labeled with defects, the selective search and non-maximum algorithms are implemented to help locate the coordinates of defects. Experiments show that the BNN model on NEU-DET can achieve 97.9% accuracy in identifying whether the image is defective or defect-free. As for the image classification speed, the FPGA-based BNN module can process one image within 0.5 s. The BNN design is modularized and can be duplicated in parallel to fully utilize logic gates and memory resources in FPGAs. It is clear that the proposed FPGA-based BNN can perform real-time defects inspection with high accuracy and it can easily scale up to larger FPGA implementations.
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spelling pubmed-80030742021-03-28 FPGA-Based Acceleration on Additive Manufacturing Defects Inspection Luo, Yawen Chen, Yuhua Sensors (Basel) Communication Additive manufacturing (AM) has gained increasing attention over the past years due to its fast prototype, easier modification, and possibility for complex internal texture devices when compared to traditional manufacture processing. However, potential internal defects are occurring during AM processes, and it requires real-time inspections to minimize the costs by either aborting the processing or repairing the defect. In order to perform the defects inspection, first the defects database NEU-DET is used for training. Then, a convolution neural network (CNN) is applied to perform defects classification. For real-time purposes, Field Programmable Gate Arrays (FPGAs) are utilized for acceleration. A binarized neural network (BNN) is proposed to best fit the FPGA bit operations. Finally, for the image labeled with defects, the selective search and non-maximum algorithms are implemented to help locate the coordinates of defects. Experiments show that the BNN model on NEU-DET can achieve 97.9% accuracy in identifying whether the image is defective or defect-free. As for the image classification speed, the FPGA-based BNN module can process one image within 0.5 s. The BNN design is modularized and can be duplicated in parallel to fully utilize logic gates and memory resources in FPGAs. It is clear that the proposed FPGA-based BNN can perform real-time defects inspection with high accuracy and it can easily scale up to larger FPGA implementations. MDPI 2021-03-18 /pmc/articles/PMC8003074/ /pubmed/33803530 http://dx.doi.org/10.3390/s21062123 Text en © 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).
spellingShingle Communication
Luo, Yawen
Chen, Yuhua
FPGA-Based Acceleration on Additive Manufacturing Defects Inspection
title FPGA-Based Acceleration on Additive Manufacturing Defects Inspection
title_full FPGA-Based Acceleration on Additive Manufacturing Defects Inspection
title_fullStr FPGA-Based Acceleration on Additive Manufacturing Defects Inspection
title_full_unstemmed FPGA-Based Acceleration on Additive Manufacturing Defects Inspection
title_short FPGA-Based Acceleration on Additive Manufacturing Defects Inspection
title_sort fpga-based acceleration on additive manufacturing defects inspection
topic Communication
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8003074/
https://www.ncbi.nlm.nih.gov/pubmed/33803530
http://dx.doi.org/10.3390/s21062123
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