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Block-Based Compression and Corresponding Hardware Circuits for Sparse Activations
In a CNN (convolutional neural network) accelerator, to reduce memory traffic and power consumption, there is a need to exploit the sparsity of activation values. Therefore, some research efforts have been paid to skip ineffectual computations (i.e., multiplications by zero). Different from previous...
| Autores principales: | , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2021
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8622461/ https://www.ncbi.nlm.nih.gov/pubmed/34833543 http://dx.doi.org/10.3390/s21227468 |