Interface Optimization and Transport Modulation of Sm(2)O(3)/InP Metal Oxide Semiconductor Capacitors with Atomic Layer Deposition-Derived Laminated Interlayer

In this paper, the effect of atomic layer deposition-derived laminated interlayer on the interface chemistry and transport characteristics of sputtering-deposited Sm(2)O(3)/InP gate stacks have been investigated systematically. Based on X-ray photoelectron spectroscopy (XPS) measurements, it can be noted that ALD-derived Al(2)O(3) interface passivation layer significantly prevents the appearance of substrate diffusion oxides and substantially optimizes gate dielectric performance. The leakage current experimental results confirm that the Sm(2)O(3)/Al(2)O(3)/InP stacked gate dielectric structure exhibits a lower leakage current density than the other samples, reaching a value of 2.87 × 10(−6) A/cm(2). In addition, conductivity analysis shows that high-quality metal oxide semiconductor capacitors based on Sm(2)O(3)/Al(2)O(3)/InP gate stacks have the lowest interfacial density of states (D(it)) value of 1.05 × 10(13) cm(−2) eV(−1). The conduction mechanisms of the InP-based MOS capacitors at low temperatures are not yet known, and to further explore the electron transport in InP-based MOS capacitors with different stacked gate dielectric structures, we placed samples for leakage current measurements at low varying temperatures (77–227 K). Based on the measurement results, Sm(2)O(3)/Al(2)O(3)/InP stacked gate dielectric is a promising candidate for InP-based metal oxide semiconductor field-effect-transistor devices (MOSFET) in the future.