Analysis for DC and RF Characteristics Recessed-Gate GaN MOSFET Using Stacked TiO(2)/Si(3)N(4) Dual-Layer Insulator

The self-heating effects (SHEs) on the electrical characteristics of the GaN MOSFETs with a stacked TiO(2)/Si(3)N(4) dual-layer insulator are investigated by using rigorous TCAD simulations. To accurately analyze them, the GaN MOSFETs with Si(3)N(4) single-layer insulator are conducted to the simulation works together. The stacked TiO(2)/Si(3)N(4) GaN MOSFET has a maximum on-state current of 743.8 mA/mm, which is the improved value due to the larger oxide capacitance of TiO(2)/Si(3)N(4) than that of a Si(3)N(4) single-layer insulator. However, the electrical field and current density increased by the stacked TiO(2)/Si(3)N(4) layers make the device’s temperature higher. That results in the degradation of the device’s performance. We simulated and analyzed the operation mechanisms of the GaN MOSFETs modulated by the SHEs in view of high-power and high-frequency characteristics. The maximum temperature inside the device was increased to 409.89 K by the SHEs. In this case, the stacked TiO(2)/Si(3)N(4)-based GaN MOSFETs had 25%-lower values for both the maximum on-state current and the maximum transconductance compared with the device where SHEs did not occur; R(on) increased from 1.41 mΩ·cm(2) to 2.56 mΩ·cm(2), and the cut-off frequency was reduced by 26% from 5.45 GHz. Although the performance of the stacked TiO(2)/Si(3)N(4)-based GaN MOSFET is degraded by SHEs, it shows superior electrical performance than GaN MOSFETs with Si(3)N(4) single-layer insulator.