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SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss
A novel Silicon-Carbide heterojunction U-MOSFET embedded a P-type pillar buried in the drift layer (BP-TMOS) is proposed and simulated in this study. When functioning in the on state, the merged heterojunction structure will control the parasitic body diode, and the switching loss will decrease. Mor...
Autores principales: | , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2022
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8880165/ https://www.ncbi.nlm.nih.gov/pubmed/35208372 http://dx.doi.org/10.3390/mi13020248 |