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SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss
A novel Silicon-Carbide heterojunction U-MOSFET embedded a P-type pillar buried in the drift layer (BP-TMOS) is proposed and simulated in this study. When functioning in the on state, the merged heterojunction structure will control the parasitic body diode, and the switching loss will decrease. Mor...
Autores principales: | , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2022
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8880165/ https://www.ncbi.nlm.nih.gov/pubmed/35208372 http://dx.doi.org/10.3390/mi13020248 |
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author | Ran, Shenglong Huang, Zhiyong Hu, Shengdong Yang, Han |
author_facet | Ran, Shenglong Huang, Zhiyong Hu, Shengdong Yang, Han |
author_sort | Ran, Shenglong |
collection | PubMed |
description | A novel Silicon-Carbide heterojunction U-MOSFET embedded a P-type pillar buried in the drift layer (BP-TMOS) is proposed and simulated in this study. When functioning in the on state, the merged heterojunction structure will control the parasitic body diode, and the switching loss will decrease. Moreover, to lighten the electric field on the gate oxide corner, a high-doped L-shaped P(+) layer near the heterojunction beneath the gate oxide was introduced; thus, the gate oxide reliability improved. A p-type pillar is introduced in the drift layer. The p-type pillar can assistant the drift layer to deplete. Thus, the specific on-resistance for BP-TMOS can be reduced with an increase in the N-drift region’s doping concentration. Compared to the traditional SiC MOSFET (C-TMOS), the specific on-resistance decreased by 20.4%, and the breakdown voltage increased by 53.7% for BP-TMOS, respectively. Meanwhile the device exhibits a 55% decrease and a 69.7% decrease for the switching loss and gate to drain charge. |
format | Online Article Text |
id | pubmed-8880165 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2022 |
publisher | MDPI |
record_format | MEDLINE/PubMed |
spelling | pubmed-88801652022-02-26 SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss Ran, Shenglong Huang, Zhiyong Hu, Shengdong Yang, Han Micromachines (Basel) Article A novel Silicon-Carbide heterojunction U-MOSFET embedded a P-type pillar buried in the drift layer (BP-TMOS) is proposed and simulated in this study. When functioning in the on state, the merged heterojunction structure will control the parasitic body diode, and the switching loss will decrease. Moreover, to lighten the electric field on the gate oxide corner, a high-doped L-shaped P(+) layer near the heterojunction beneath the gate oxide was introduced; thus, the gate oxide reliability improved. A p-type pillar is introduced in the drift layer. The p-type pillar can assistant the drift layer to deplete. Thus, the specific on-resistance for BP-TMOS can be reduced with an increase in the N-drift region’s doping concentration. Compared to the traditional SiC MOSFET (C-TMOS), the specific on-resistance decreased by 20.4%, and the breakdown voltage increased by 53.7% for BP-TMOS, respectively. Meanwhile the device exhibits a 55% decrease and a 69.7% decrease for the switching loss and gate to drain charge. MDPI 2022-02-01 /pmc/articles/PMC8880165/ /pubmed/35208372 http://dx.doi.org/10.3390/mi13020248 Text en © 2022 by the authors. https://creativecommons.org/licenses/by/4.0/Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). |
spellingShingle | Article Ran, Shenglong Huang, Zhiyong Hu, Shengdong Yang, Han SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss |
title | SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss |
title_full | SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss |
title_fullStr | SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss |
title_full_unstemmed | SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss |
title_short | SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss |
title_sort | sic heterojunction trench mosfet with a buried p-type pillar for the low gate-drain charge and switching loss |
topic | Article |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8880165/ https://www.ncbi.nlm.nih.gov/pubmed/35208372 http://dx.doi.org/10.3390/mi13020248 |
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