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Dielectric ceramics/TiO(2)/single-crystalline silicon nanomembrane heterostructure for high performance flexible thin-film transistors on plastic substrates

A dielectric ceramics/TiO(2)/single-crystalline silicon nanomembrane (SiNM) heterostructure is designed and fabricated for high performance flexible thin-film transistors (TFTs). Both the dielectric ceramics (Nb(2)O(3)–Bi(2)O(3)–MgO) and TiO(2) are deposited by radio frequency (RF) magnetron sputter...

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Detalles Bibliográficos
Autores principales: Qin, Guoxuan, Pei, Zhihui, Zhang, Yibo, Lan, Kuibo, Li, Quanning, Li, Lingxia, Yu, Shihui, Chen, Xuejiao
Formato: Online Artículo Texto
Lenguaje:English
Publicado: The Royal Society of Chemistry 2019
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9074119/
https://www.ncbi.nlm.nih.gov/pubmed/35530705
http://dx.doi.org/10.1039/c9ra06572e
Descripción
Sumario:A dielectric ceramics/TiO(2)/single-crystalline silicon nanomembrane (SiNM) heterostructure is designed and fabricated for high performance flexible thin-film transistors (TFTs). Both the dielectric ceramics (Nb(2)O(3)–Bi(2)O(3)–MgO) and TiO(2) are deposited by radio frequency (RF) magnetron sputtering at room temperature, which is compatible with flexible plastic substrates. And the single-crystalline SiNM is transferred and attached to the dielectric ceramics/TiO(2) layers to form the heterostructure. The experimental results demonstrate that the room temperature processed heterostructure has high quality because: (1) the Nb(2)O(3)–Bi(2)O(3)–MgO/TiO(2) heterostructure has a high dielectric constant (∼76.6) and low leakage current. (2) The TiO(2)/single-crystalline SiNM structure has a relatively low interface trap density. (3) The band gap of the Nb(2)O(3)–Bi(2)O(3)–MgO/TiO(2) heterostructure is wider than TiO(2), which increases the conduction band offset between Si and TiO(2), lowering the leakage current. Flexible TFTs have been fabricated with the Nb(2)O(3)–Bi(2)O(3)–MgO/TiO(2)/SiNM heterostructure on plastic substrates and show a current on/off ratio over 10(4), threshold voltage of ∼1.2 V, subthreshold swing (SS) as low as ∼0.2 V dec(−1), and interface trap density of ∼10(12) eV(−1) cm(−2). The results indicate that the dielectric ceramics/TiO(2)/SiNM heterostructure has great potential for high performance TFTs.