A vertical WSe(2)–MoSe(2) p–n heterostructure with tunable gate rectification

Here, we report the synthesis of a vertical MoSe(2)/WSe(2) p–n heterostructure using a sputtering-CVD method. Unlike the conventional CVD method, this method produced a continuous MoSe(2)/WSe(2) p–n heterostructure. WSe(2) and MoSe(2) back-gated field effect transistors (FETs) exhibited good gate modulation behavior, and high hole and electron mobilities of ∼2.2 and ∼15.1 cm(2) V(−1) s(−1), respectively. The fabricated vertical MoSe(2)/WSe(2) p–n diode showed rectifying I–V behavior with back-gate tunability. The rectification ratio of the diode was increased with increasing gate voltage, and was increased from ∼18 to ∼1600 as the gate bias increased from −40 V to +40 V. This is attributed to the fact that the barrier height between p-WSe(2) and n-MoSe(2) is modulated due to the back-gate bias. The rectification ratio is higher than the previously reported values for the TMDC p–n heterostructure grown by CVD.