Cargando…

Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing

To improve the test accuracy and fault coverage of high-speed railway-related equipment boards, a time-varying pseudorandom disturbance algorithm based on the automatic test pattern generation technology in chip testing is proposed. The algorithm combines the pseudorandom pattern generation algorith...

Descripción completa

Detalles Bibliográficos
Autores principales: Chen, Xiaoming, Wang, Zhixuan, Yu, Zhiyang, Chui, Hsiang-Chen
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9229937/
https://www.ncbi.nlm.nih.gov/pubmed/35744467
http://dx.doi.org/10.3390/mi13060853
_version_ 1784734904928436224
author Chen, Xiaoming
Wang, Zhixuan
Yu, Zhiyang
Chui, Hsiang-Chen
author_facet Chen, Xiaoming
Wang, Zhixuan
Yu, Zhiyang
Chui, Hsiang-Chen
author_sort Chen, Xiaoming
collection PubMed
description To improve the test accuracy and fault coverage of high-speed railway-related equipment boards, a time-varying pseudorandom disturbance algorithm based on the automatic test pattern generation technology in chip testing is proposed. The algorithm combines the pseudorandom pattern generation algorithm with the deterministic pattern generation D algorithm. The existing pseudorandom number generation method usually requires random seeds to generate a series of pseudorandom numbers. In this algorithm, the system timer is used as the random seed to design a pseudorandom pattern generation method of time-varying seed to improve the randomness of pseudorandom pattern generation. In addition, in combination with the D algorithm, this work proposes a new switching logic between two algorithms by counting invalid pattern proportions. When the algorithm is applied to track a circuit netlist, the fault coverage can reach near 100%. However, the large-scale circuit fault coverage cannot easily reach 100%. The test results for the standard circuits of different sizes show that at the same time, compared with the independent pattern generation methods, the proposed algorithm can improve fault coverage by more than 50% and 30% and significantly improve the pattern generation efficiency. Therefore, it can be used perfectly in the subsequent construction of high-speed railway equipment test platforms.
format Online
Article
Text
id pubmed-9229937
institution National Center for Biotechnology Information
language English
publishDate 2022
publisher MDPI
record_format MEDLINE/PubMed
spelling pubmed-92299372022-06-25 Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing Chen, Xiaoming Wang, Zhixuan Yu, Zhiyang Chui, Hsiang-Chen Micromachines (Basel) Article To improve the test accuracy and fault coverage of high-speed railway-related equipment boards, a time-varying pseudorandom disturbance algorithm based on the automatic test pattern generation technology in chip testing is proposed. The algorithm combines the pseudorandom pattern generation algorithm with the deterministic pattern generation D algorithm. The existing pseudorandom number generation method usually requires random seeds to generate a series of pseudorandom numbers. In this algorithm, the system timer is used as the random seed to design a pseudorandom pattern generation method of time-varying seed to improve the randomness of pseudorandom pattern generation. In addition, in combination with the D algorithm, this work proposes a new switching logic between two algorithms by counting invalid pattern proportions. When the algorithm is applied to track a circuit netlist, the fault coverage can reach near 100%. However, the large-scale circuit fault coverage cannot easily reach 100%. The test results for the standard circuits of different sizes show that at the same time, compared with the independent pattern generation methods, the proposed algorithm can improve fault coverage by more than 50% and 30% and significantly improve the pattern generation efficiency. Therefore, it can be used perfectly in the subsequent construction of high-speed railway equipment test platforms. MDPI 2022-05-29 /pmc/articles/PMC9229937/ /pubmed/35744467 http://dx.doi.org/10.3390/mi13060853 Text en © 2022 by the authors. https://creativecommons.org/licenses/by/4.0/Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
spellingShingle Article
Chen, Xiaoming
Wang, Zhixuan
Yu, Zhiyang
Chui, Hsiang-Chen
Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing
title Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing
title_full Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing
title_fullStr Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing
title_full_unstemmed Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing
title_short Time-Varying Pseudorandom Disturbed Pattern Generation Algorithm for Track Circuit Equipment Testing
title_sort time-varying pseudorandom disturbed pattern generation algorithm for track circuit equipment testing
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9229937/
https://www.ncbi.nlm.nih.gov/pubmed/35744467
http://dx.doi.org/10.3390/mi13060853
work_keys_str_mv AT chenxiaoming timevaryingpseudorandomdisturbedpatterngenerationalgorithmfortrackcircuitequipmenttesting
AT wangzhixuan timevaryingpseudorandomdisturbedpatterngenerationalgorithmfortrackcircuitequipmenttesting
AT yuzhiyang timevaryingpseudorandomdisturbedpatterngenerationalgorithmfortrackcircuitequipmenttesting
AT chuihsiangchen timevaryingpseudorandomdisturbedpatterngenerationalgorithmfortrackcircuitequipmenttesting