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Fabrication and Electrical Characterization of High Aspect Ratio Through-Silicon Vias with Polyimide Liner for 3D Integration
High aspect ratio (HAR) through-silicon vias (TSVs) are in urgent need to achieve smaller keep-out zones (KOZs) and higher integration density for the miniaturization of high-performance three-dimensional (3D) integration of integrated circuits (IC), micro-electro-mechanical systems (MEMS), and othe...
Autores principales: | Chen, Xuyan, Chen, Zhiming, Xiao, Lei, Hao, Yigang, Wang, Han, Ding, Yingtao, Zhang, Ziyue |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2022
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9323921/ https://www.ncbi.nlm.nih.gov/pubmed/35888964 http://dx.doi.org/10.3390/mi13071147 |
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