A 7.4-Bit ENOB 600 MS/s FPGA-Based Online Calibrated Slope ADC without External Components

A slope analog-to-digital converter (ADC) amenable to be fully implemented on a digital field programmable gate array (FPGA) without requiring any external active or passive components is proposed in this paper. The amplitude information, encoded in the transition times of a standard LVDS differenti...

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Detalles Bibliográficos
Autores principales: Zhang, Mengdi, Zhao, Ye, Chen, Yong, Crovetti, Paolo, Wang, Yanji, Ning, Xinshun, Qiao, Shushan
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9371103/
https://www.ncbi.nlm.nih.gov/pubmed/35957409
http://dx.doi.org/10.3390/s22155852

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9371103/
https://www.ncbi.nlm.nih.gov/pubmed/35957409
http://dx.doi.org/10.3390/s22155852

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