Vertical Gate-All-Around Device Architecture to Improve the Device Performance for Sub-5-nm Technology

In this work, we propose a vertical gate-all-around device architecture (GAA-FinFET) with the aim of simultaneously improving device performance as well as addressing the short channel effect (SCE). The GAA-FinFET was built using the technology computer-aided design (TCAD) simulation tool, and then,...

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Detalles Bibliográficos
Autores principales: Noh, Changwoo, Han, Changwoo, Won, Sang Min, Shin, Changhwan
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9502989/
https://www.ncbi.nlm.nih.gov/pubmed/36144174
http://dx.doi.org/10.3390/mi13091551

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9502989/
https://www.ncbi.nlm.nih.gov/pubmed/36144174
http://dx.doi.org/10.3390/mi13091551

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