Ion Drift and Polarization in Thin SiO(2) and HfO(2) Layers Inserted in Silicon on Sapphire

To reduce the built-in positive charge value at the silicon-on-sapphire (SOS) phase border obtained by bonding and a hydrogen transfer, thermal silicon oxide (SiO(2)) layers with a thickness of 50–310 nm and HfO(2) layers with a thickness of 20 nm were inserted between silicon and sapphire by plasma-enhanced atomic layer deposition (PEALD). After high-temperature annealing at 1100 °C, these layers led to a hysteresis in the drain current–gate voltage curves and a field-induced switching of threshold voltage in the SOS pseudo-MOSFET. For the inserted SiO(2) with a thickness of 310 nm, the transfer transistor characteristics measured in the temperature ranging from 25 to 300 °C demonstrated a triple increase in the hysteresis window with the increasing temperature. It was associated with the ion drift and the formation of electric dipoles at the silicon dioxide boundaries. A much slower increase in the window with temperature for the inserted HfO(2) layer was explained by the dominant ferroelectric polarization switching in the inserted HfO(2) layer. Thus, the experiments allowed for a separation of the effects of mobile ions and ferroelectric polarization on the observed transfer characteristics of hysteresis in structures of Si/HfO(2)/sapphire and Si/SiO(2)/sapphire.