A Novel Capacitorless 1T DRAM with Embedded Oxide Layer

A novel vertical dual surrounding gate transistor with embedded oxide layer is proposed for capacitorless single transistor DRAM (1T DRAM). The embedded oxide layer is innovatively used to improve the retention time by reducing the recombination rate of stored holes and sensing electrons. Based on T...

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Detalles Bibliográficos
Autores principales: Zhao, Dongxue, Xia, Zhiliang, Yang, Tao, Yang, Yuancheng, Zhou, Wenxi, Huo, Zongliang
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9608245/
https://www.ncbi.nlm.nih.gov/pubmed/36296125
http://dx.doi.org/10.3390/mi13101772

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9608245/
https://www.ncbi.nlm.nih.gov/pubmed/36296125
http://dx.doi.org/10.3390/mi13101772

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