High-Performance and Flexible Design Scheme with ECC Protection in the Cache

To improve the reliability of static random access memory (SRAM), error-correcting codes (ECC) are typically used to protect SRAM in the cache. While improving the reliability, we also need additional circuits to support ECC, including encoding and decoding logic. In a high-speed circuit such as a C...

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Detalles Bibliográficos
Autores principales: Zhou, Yulun, Liu, Hongxia, Xiang, Qi, Yin, Chenyu
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9697281/
https://www.ncbi.nlm.nih.gov/pubmed/36363952
http://dx.doi.org/10.3390/mi13111931

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9697281/
https://www.ncbi.nlm.nih.gov/pubmed/36363952
http://dx.doi.org/10.3390/mi13111931

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