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Combined Distributed Shared-Buffered and Diagonally-Linked Mesh Topology for High-Performance Interconnect

Networks-on-Chip (NoCs) have become the de-facto on-chip interconnect for multi/manycore systems. A typical NoC router is made up of buffers used to store packets that are unable to advance to their desired destination. However, buffers consume significant power/area and are often underutilized, esp...

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Detalles Bibliográficos
Autores principales: Effiong, Charles, Sassatelli, Gilles, Gamatié, Abdoulaye
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9783475/
https://www.ncbi.nlm.nih.gov/pubmed/36557547
http://dx.doi.org/10.3390/mi13122246