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Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process

A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). A photolithography-based patterning process is developed to fabricate scaled electronic devices with complex organic se...

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Autores principales: Lee, Yongsu, Kwon, Heejin, Kim, Seung-Mo, Lee, Ho-In, Kim, Kiyung, Lee, Hae-Won, Kim, So-Young, Hwang, Hyeon Jun, Lee, Byoung Hun
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Springer Nature Singapore 2023
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9998751/
https://www.ncbi.nlm.nih.gov/pubmed/36894801
http://dx.doi.org/10.1186/s40580-023-00362-w
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author Lee, Yongsu
Kwon, Heejin
Kim, Seung-Mo
Lee, Ho-In
Kim, Kiyung
Lee, Hae-Won
Kim, So-Young
Hwang, Hyeon Jun
Lee, Byoung Hun
author_facet Lee, Yongsu
Kwon, Heejin
Kim, Seung-Mo
Lee, Ho-In
Kim, Kiyung
Lee, Hae-Won
Kim, So-Young
Hwang, Hyeon Jun
Lee, Byoung Hun
author_sort Lee, Yongsu
collection PubMed
description A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). A photolithography-based patterning process is developed to fabricate scaled electronic devices with complex organic semiconductor channel structures. Two layers of thin DNTT with a separation layer are fabricated via the low-temperature deposition process, and for the first time, p-type ternary logic switching characteristics exhibiting zero differential conductance in the intermediate current state are demonstrated. The stability of the DNTT stack-channel ternary logic switch device is confirmed by implementing a resistive-load ternary logic inverter circuit. SUPPLEMENTARY INFORMATION: The online version contains supplementary material available at 10.1186/s40580-023-00362-w.
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spelling pubmed-99987512023-03-11 Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process Lee, Yongsu Kwon, Heejin Kim, Seung-Mo Lee, Ho-In Kim, Kiyung Lee, Hae-Won Kim, So-Young Hwang, Hyeon Jun Lee, Byoung Hun Nano Converg Full Paper A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). A photolithography-based patterning process is developed to fabricate scaled electronic devices with complex organic semiconductor channel structures. Two layers of thin DNTT with a separation layer are fabricated via the low-temperature deposition process, and for the first time, p-type ternary logic switching characteristics exhibiting zero differential conductance in the intermediate current state are demonstrated. The stability of the DNTT stack-channel ternary logic switch device is confirmed by implementing a resistive-load ternary logic inverter circuit. SUPPLEMENTARY INFORMATION: The online version contains supplementary material available at 10.1186/s40580-023-00362-w. Springer Nature Singapore 2023-03-09 /pmc/articles/PMC9998751/ /pubmed/36894801 http://dx.doi.org/10.1186/s40580-023-00362-w Text en © The Author(s) 2023 https://creativecommons.org/licenses/by/4.0/Open AccessThis article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article's Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article's Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/ (https://creativecommons.org/licenses/by/4.0/) .
spellingShingle Full Paper
Lee, Yongsu
Kwon, Heejin
Kim, Seung-Mo
Lee, Ho-In
Kim, Kiyung
Lee, Hae-Won
Kim, So-Young
Hwang, Hyeon Jun
Lee, Byoung Hun
Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process
title Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process
title_full Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process
title_fullStr Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process
title_full_unstemmed Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process
title_short Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process
title_sort demonstration of p-type stack-channel ternary logic device using scalable dntt patterning process
topic Full Paper
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9998751/
https://www.ncbi.nlm.nih.gov/pubmed/36894801
http://dx.doi.org/10.1186/s40580-023-00362-w
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